Dengjie Wang

Biography

Enrollment Date : 2015

Anticipated Graduation Date:2020

Type of Candidate:Ph.D. Candidate

Advisors:Hong Chen

Department:Institute of Microelectronics,Tsinghua University

Research Area:

Publications

Papers:

[1] Zeliang Zhao, Xin Wu, Dengjie Wang, Ziqiang Wang, Chun Zhang, Xiangyu Li, Zhihua Wang, A 40 Gbps PAM-4 Receiver with 12-Tap Direct Decision Feedback Equalizer Employing 1.5-stage Slicers in 65-nm CMOS, ICTA 2022, pp.230-231, 2022.

[2] Ziqiang Wang, Dengjie Wang, Xin Wu, Jiawei Wang, Hao Xu, Chun Zhang, Hong Chen, Zhihua Wang, A 44 Gbps PAM-4 Transmitter with Resistance Feedback 4:1 MUX in 65nm CMOS, ICSICT 2022, pp.1-3, 2022.

[3] Dengjie Wang,Ziqiang Wang,Hao Xu,Jiawei Wang,Zeliang Zhao,Chun Zhang,Zhihua Wang,Hong Chen, A 56-Gbps PAM-4 Wireline Receiver With 4-Tap Direct DFE Employing Dynamic CML Comparators in 65 nm CMOS, IEEE Transactions on Circuits and Systems I: Regular Papers, Vol.PP, No.99, pp.1-14, 2021.

[4] Hong Chen,Dengjie Wang,Ziqiang Wang,Shuai Yuan,Chun Zhang,Zhihua Wang, An 11.05 mW/Gbps Quad-Channel 1.25-10.3125 Gbps Serial Transceiver With a 2-Tap Adaptive DFE and a 3-Tap Transmit FFE in 40 nm CMOS, IEEE Access, Vol.9, pp.70856-70867, 2021.

[5] Dengjie Wang,Hong Chen,Wenhuan Luan,Xin Lin,Fangxu Lv,Ziqiang Wang,Hanjun Jiang,Chun Zhang,Zhihua Wang, A 4-40 Gb/s PAM-4 transmitter with a hybrid driver in 65 nm CMOS technology, MWSCAS 2019, pp. 251 - 254, 2019.

[6] Wenhuan Luan,Xiangyu Li,Dengjie Wang,Ziqiang Wang,Xin Lin,Mao Li, A 1.25-8.5 Gb/s wide range CDR with locking detector in 40 nm CMOS technology, EDSSC 2019, pp. 1 - 3, 2019.

[7] Mao Li,Yuxing Zhou,Dengjie Wang,Shuai Yuan,Wenhuan Luan,Xin Lin,Ziqiang Wang,Chun Zhang,Xiang Xie, A max mode control LDO with a good behavior at PSRR and line regulation and load regulation, EDSSC 2017, pp. 1 - 2, 2017.

[8] Fangxu Lv,Jianye Wang,Dengjie Wang,Yongcong Liu,Ziqiang Wang, Design of 56 Gb/s PAM4 Wire-line Receiver With Ring VCO Based CDR in a 65 nm CMOS Technology, ASICON 2017, pp. 537 - 540, 2017.