Biography
Enrollment Date: 2014
Graduation Date：2017
Degree：M.S.
Defense Date：2017.05.24
Advisors：Haigang Feng
Department：Institute of Microelectronics，Tsinghua University
Title of Dissertation/Thesis：28nm CMOS 12-bit 200MS/s Low Power ADC
Abstract:
The traditional Analog-Digital Convertor (ADC) structures have their own advantage and disadvantage, and different application area. Although some new techniques such as the monotonic switching scheme and redundancy technique, could more or less improve the performance of the traditional SAR ADC, they can’t overcome the fundamental limitation of SAR ADC. Therefore, the ADC research start focusing on the hybrid ADC based on SAR ADC. Moreover, the traditional pipeline technique is used to accelerate the speed of hybrid ADC.
This work begins with introduction to the traditional ADC structures, with an emphasis on SAR ADC and Pipeline ADC. Next, as one of the hotspots in ADC research, TDC (Time-Digital Converter) is also discussed. At last, a two-stage pipeline ADC, composed of a 7-bit SAR ADC and a 5-bit TDC, is proposed and fabricated in the SIMC 28nm CMOS HK process. The simulation results shows that 68.3dB SNDR is achieved at nyquist input frequency. The ADC consumes 2.5mW power and achieves 5.1fJ/Conv-Step Figure of Merit (FOM).