Biography
Enrollment Date: 2013
Graduation Date：2016
Degree：M.S.
Defense Date：2016.05.31
Advisors：Hanjun Jiang
Department：Institute of Microelectronics，Tsinghua University
Title of Dissertation/Thesis：Environmental Speech Intelligent Sensing Circuit Technology Research Under The Specific Application
Abstract:
Environment speech signal is closely related to our daily life. At present, with the rapid development of microelectronics technology, miniaturization, low power consumption has become the future development trend of all kinds of electronic communication equipment. In the specific application of environment speech signal, whether or not a good or bad acquired speech signal quality by analog front-end is very important to eventually received voice performance, also a good analog front-end can greatly reduce the subsequent pressure such as signal processing circuit. At the same time, speech endpoint detection circuit is the important premise of the subsequent speech recognition, speech enhancement, speech synthesis, compression and coding of kinds of speech signal processing technology. The acquired speech signal by analog front-end is processed by speech endpoint detection circuit to find out the start and end point can reduce the interference of the silent period and improve the speech signal processing efficiency.
This work has investigated the microphone preamplifier and A/D converter circuit structure used in the speech signal acquisition analog front-end and speech endpoint detection algorithm and hardware implementation in detail. Ultimately, the two op amp instrumentation amplifier and 16 bit sigma delta ADC circuit has been used to design based on UMC 0.18um CMOS process. The circuit also includes bias and band gap reference circuit, SPI controlled register stack and other auxiliary circuit. A double threshold detection algorithm is used in the hardware implementation of speech endpoint detection which based on the speech signal time-domain characteristics of short-time magnitude and short-time zero crossing rate.
This work focuses on the low noise design of the two op amp instrumentation amplifier whose input range can span power rail to ground rail. According to the strength of the microphone output signal amplitude, preamplifier has variable gain. For ADC part, a single loop 3 order 5 bit feed-forward structure is selected in modulator, cascaded integrator comb (CIC) decimation filter and CIC compensation filter and half band filter cascaded structure is used in down-sampling filter. The paper elaborates on the simulink modeling and hardware implement of the down-sampling filter, and the simulation results are given, finally verified in FPGA. The paper introduces the hardware realization process of the double threshold detection algorithm of speech endpoint detection in detail, finally gives the detection results of the hardware implement.
Speech acquisition analog front-end test results show that the gain of the preamplifier can be varied in 12 to 40dB range which can be changed 3dB per step. Within the signal bandwidth range of 20Hz to 6.4kHz, the test result includes preamplifier and ADC can achieve SNR of 56dB and THD of -50dB when the preamplifier is set as the typical gain of 30dB and the power consumption for preamplifier is 420μW and ADC for 506μW. Further analysis of the test results, by improving the design the simulation results show that the SNR is 81dB when the preamplifier has the gain of 30dB and the SNR is 87dB when the preamplifier has the gain of 21dB. In addition, Speech endpoint detection circuit has very high detection accuracy. By synthesize, the LUTs consumption is 7369 and registers is 6568. Because of the dynamic framing and CSD coding technology in the hardware design, the total realization can save about 33% of the multiplication resources.