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Zheng Song

Biography

Enrollment Date: 2011

Graduation Date：2014

Degree：M.S.

Defense Date：2014.05.27

Advisors：Baoyong Chi

Department：Institute of Microelectronics，Tsinghua University

Title of Dissertation/Thesis：Research on Key Techniques of Low Power Full-Integrated Dual-Channel Civil GNSS Receiver RF Chip

Abstract:
The Global Navigation Satellite System (GNSS) has experienced great development these years. Currently, there are four worldwide systems, including the Galileo from EU, the Beidou from China, the GLONASS from Russia, and the GPS from US. As the available satellite resources enriched, multi-system interoperation becomes the trend for next generation GNSS. Based on this background, this thesis focuses on the research of key techniques in multi-mode GNSS radio receiver design. A fully-integrated low power, multi-constellation supported GNSS radio chip is implemented.

Publications

Papers：：

[1] Jianfu Lin,Zheng Song,Nan Qi,Woogeun Rhee,Zhihua Wang,Baoyong Chi, A 77-GHz Mixed-Mode FMCW Signal Generator Based on Bang-Bang Phase Detector, IEEE Journal of Solid-State Circuits, Vol.53, No.10, pp. 2850 - 2863, 2018.

[2] Baoyong Chi,Zheng Song,Haikun Jia,Lixue Kuang,Jianfu Lin,Zhihua Wang, CMOS circuit techniques for mm-wave communications, IWS 2018, pp. 1 - 3, 2018.

[3] Zhenwu Wang,Sijia Jiang,Zheng Song,Baoyong Chi, A U-Band Direct Injection-Locked Frequency Divider With Wide Input Locking Range and Low Power, EDSSC 2017, pp. 1 - 2, 2017.

[4] Baoyong Chi,Zheng Song,Lixue Kuang,Haikun Jia,Xiangyu Meng,Zhihua Wang, CMOS mm-wave transceivers for Gbps wireless communication, Journal of Semiconductors, No.7, pp. 5 - 15, 2016.

[5] Peiyi Li,Zheng Song,Jianfu Lin,Meng Wei,Feng Guo,Wen Jia,Zhihua Wang,Baoyong Chi, A Reconfigurable Digital Polar Transmitter with Open-loop Phase Modulation for Sub-GHz Applications, ISIE 2016, pp. 1158 - 1161, 2016.

[6] Yinghang Wu,Zheng Song,Yutian Li,Zhiran Liu,Baoyong Chi, A High Linearity Active-RC BPF with 70MHz Center Frequency and 22MHz Bandwidth in 65nm CMOS, ICSICT 2016, 2016.

[7] Zhiran Liu,Zheng Song,Yinghang Wu,Yutian Li,Baoyong Chi, A 10Gbps Half-Rate Digital Clock and Data Recovery Circuit for 60GHz Receiver in 65nm CMOS, ICSICT 2016, 2016.

[8] Yutian Li,Zheng Song,Zhiran Liu,Yinghang Wu,Baoyong Chi, A wideband and high linearity Programmable Gain Amplifier for 60GHz Receiver in 65nm CMOS, ICSICT 2016, 2016.

[9] Haikun Jia,Baoyong Chi,Lixue Kuang,Xiaobao Yu,Lei Chen,Wei Zhu,Meng Wei,Zheng Song,Zhihua Wang, Research on CMOS Mm-Wave Circuits and Systems for Wireless Communications, China Communications, Vol.12, No.5, pp. 1 - 13, 2015.

[10] Jiachen Hao,Zheng Song,Baoyong Chi, A Reconfigurable Analog Baseband for Low-Power Wi-Fi Receiver, ASICON 2015, pp. 1 - 4, 2015.

[11] Lixue Kuang,Xiaobao Yu,Haikun Jia,Lei Chen,Wei Zhu,Meng Wei,Zheng Song,Zhihua Wang,Baoyong Chi, A fully-integrated 60-GHz 5-Gb/s QPSK transceiver with T/R switch in 65-nm CMOS, IEEE Transactions on Microwave Theory and Techniques, Vol.62, No.12, pp. 3131 - 3145, 2014.

[12] Xiliang Liu,Zheng Song,Wen Jia,Baoyong Chi, An Output Capacitorless Low-Dropout Regulator Based on Flipped Voltage Follower, ICSICT 2014, pp. 1 - 3, 2014.

[13] Zheng Song,Nan Qi,Baoyong Chi,Zhihua Wang, A multi-mode reconfigurable analog baseband with I/Q calibration for GNSS receivers, ASP-DAC 2014, pp. 29 - 30, 2014.

[14] Nan Qi,Zheng Song,Baoyong Chi,Tianling Ren,Albert Wang,Zhihua Wang, A Multi-Mode Complex Bandpass Filter With gm-Assisted Power Optimization and I/Q Calibration, ISCAS 2013, pp. 1845 - 1848, 2013.

[15] Nan Qi,Baoyong Chi,Yang Xu,Zhou Chen,Jun Xie,Zheng Song,Zhihua Wang, A 180nm fully-integrated dual-channel reconfigurable receiver for GNSS interoperations, ESSCIRC 2013, pp. 177 - 180, 2013.

[16] Nan Qi,Baoyong Chi,Yang Xu,Zhou Chen,Jun Xie,Yang Xu,Zheng Song,Zhihua Wang, An asymmetric dual-channel reconfigurable receiver for GNSS in 180nm CMOS, CICC 2013, pp. 1 - 4, 2013.

[17] Nan Qi,Zheng Song,Zehong Zhang,Yang Xu,Baoyong Chi,Zhihua Wang, A Multi-Mode Blocker-Tolerant GNSS Receiver with CT Sigma-Delta ADC in 65 nm CMOS, A-SSCC 2013, pp. 333 - 336, 2013.