Biography
Enrollment Date: 2010
Graduation Date：2013
Degree：M.S.
Defense Date：2013.05.28
Advisors：Chun Zhang
Department：Institute of Microelectronics，Tsinghua University
Title of Dissertation/Thesis：Digital circuit design for short distance wireless communication chip
Abstract:
This paper studies digital circuit design about short distance wireless communication chip applied in wireless body area network. The function of the chip is to realize the short-distance wireless transmission of physiological measurement parameters. This paper completed the integral digital circuit design process including the function definition, the system architecture design, the algorithm performance simulation, code debugging and simulation on register transfer level, FPGA verification, digital back-end design and chip testing.
This paper introduces the half-duplex active chip from the hardware structure design, performance parameters and functional division about hardware and software. This chip works at the frequency and of 400MHz. And it adopts two methods of digital modulation including 2FSK and MSK whose transmission rate is 100Kbps and 2Mbps.The function of this chip is divided into three levels such as the physical layer, the media access control layer and the protocol layer. The physical layer is responsible for the modulation and demodulation. The media access control layer is responsible for packaging and unpacking. The protocol layer is responsible for the process of protocol. The physical layer and the media access control layer are implemented by the hardware circuit. Correspondingly, the function of protocol layer is implemented by software on the microprocessor integrated in the chip.
This paper introduces the principle of modulation and demodulation about 2FSK and MSK. And the job of anti-noise performance simulation of each demodulation algorithm is also done in this paper. The paper adopted the method of delay multiplied by autocorrelation to achieve the function of 2FSK demodulation, and adopted the method of identifying the changing moment of the phase rotation direction to achieve the function of MSK demodulation. The result of simulation shows that the BER of these two demodulation algorithm reached when SNR is and respectively. It meets the needs of the project with a small circuit scale.
This paper completed the design and FPGA verification of digital circuits including the physical layer modulation and demodulation circuit, the media access control layer control circuit, the interface and control circuit. The physical layer circuit comprises 2FSK and MSK modulation and demodulation circuit. The media access control layer control circuit includes a frame format, the packing and unpacking circuit. The interface and control circuit include the interface circuit between MCU and digital baseband, the serial peripheral interface circuit, the automatic generation control circuit on intermediate frequency and radiofrequency. This paper also completed the digital back-end design and tape-out of the 2FSK communication circuit. The digital area occupies 8mm2 and the total power of the chip is 144mW.
Finally, this paper completed the testing of logic functional and performance of the chip. This paper designed a test program of receiver sensitivity based on virtual instrument with the idea of software radio. And this paper completed the test of 2FSK receiver sensitivity with the software of LabVIEW and PXI platform. The test result shows that the receiver sensitivity of 2FSK reaches , whose performance meets the need of the project.