Title：Automatic delay matching method for an asynchronous circuit
Country：China
Patent No.：201910120574.5
Legal Status：Authorized
Inventor：Hong Chen, Hui Wu
Assignee：Tsinghua University
Address：Tsinghua University,Haidian District Beijing 100084, China
Filing Date：2019-02-18
Issue Date：2021-06-08
Abstract：
According to the invention, automatic delay matching can be carried out on the Click unit-based bundled data asynchronous circuit, so that the Click unit-based bundled data asynchronous circuit can work normally. An asynchronous circuit bound with data needs to be subjected to delay matching to enable the circuit to work normally, but a designer cannot directly use a mature commercial EDA tool tocomplete the work. In order to solve the problem, the invention provides a method capable of capturing all time sequence paths based on a Synopsys Designn Compill (DC) tool and automatically carryingout delay matching on a Click unit-based bundled data asynchronous circuit. According to the invention, delay matching can be automatically carried out on the bundled data asynchronous circuit, so that the asynchronous circuit can work normally, and the design difficulty of the asynchronous circuit is greatly reduced.
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