Title：Input sampling and conversion front-end circuit
Country：China
Patent No.：201610140328.2
Legal Status：Authorized
Inventor：Fule Li, Ying Ju
Assignee：Tsinghua University
Address：Tsinghua University,Haidian District Beijing 100085, China
Filing Date：2016-03-11
Issue Date：2020-06-02
Abstract：
The invention discloses a sampling and conversion front-end circuit which comprises m sampling capacitors (CC1-CCm) and m comparators, wherein the base plates of the m sampling capacitors (CC1-CCm) are respectively connected with an input voltage Vin and output conversion results Q1-Qm; the conversion results Q1-Qm respectively control the base plates of the capacitors (CC1-CCm) to be connected with a Vrefp or Vrefn, and top plates of the capacitors are all connected in parallel to obtain a VE; and the VE serves as the input of a refined ADC. According to the invention, the sampling and conversion front-end circuit has the advantages that the aperture errors are reduced, the input signal load is reduced, and the chip area is optimized.
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