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Guoqin Yao

Biography

Enrollment Date: 2006

Graduation Date:2009

Degree:M.S.

Defense Date:2009.06.02

Advisors:Baoyong Chi

Department:Institute of Microelectronics,Tsinghua University

Title of Dissertation/Thesis:Research On CMOS Implementation of Multi-band Reconfigurable Wireless Receiver

Abstract:
With the rapid growing of wireless communication, multi-band reconfigurable wireless transceivers become a hot issue. But due to the difficulty in the implementation of the multi-band RF(radio frequency) circuits, the design of the multi-band reconfigurable transceivers is a great challenge. The thesis researches on key issues during the implementation of 2.4GHz/5.2GHz dual-band reconfigurable RF frontend, which would be useful for the implementation of the whole multi-band reconfigurable transceivers. Since the performance of the RF circuits are greatly limited by the on-chip inductors, to predict the electrical characteristics of the on chip inductor accurately is the most important issue to keep the highly correctness of the RF circuit simulation. In this thesis, HFSS is used to complete the electromagnetic(EM) simulation of on-chip inductors, and the results are compared with the inductor model provided by the foundry. The process parameters are adjusted to assure the consistency between the EM simulation and the inductor model. According to the requirements of RF circuits, a compact symmetric switchable on-chip inductor is designed, and the accurate electrical characteristics (S-parameters) are extracted by EM simulation. This kind of inductor can improve the symmetry of the differential circuits, also enhance the integration level and save a lot of the die area. By utilizing the designed symmetrical on-chip inductor, this thesis implements a 2.4GHz/5.2GHz dual-band reconfigurable receiver’s RF frontend. A zero-IF architecture is used due to its high integration level, and the front-end consists of a multi-band reconfigurable low-noise amplifier, quadrature down converter and high-speed divide-by-2 divider for quadrature LO generation. An improved common gate topology with a positive feedback is used in the low-noise amplifier, therefore, the center frequency of the input impedance matching will be consistent with the gain resonant frequency, which makes the reconfiguration of the input impedance matching and the gain at the same time much easier. The following mixer is a double-balance Gilbert cell, which can provide some voltage conversion gain. This frontend is fabricated in UMC 180nm RF CMOS process, and the measurement results show that the center operation frequency in dual band modes is shifted to 2.2GHz and 4.5GHz, respectively. The conversion gain is about 25dB in 2.2GHz band and 18.6dB in 4.5GHz. Noise figure is about 9.8dB in 2.2GHz band and 10.6dB in 4.5GHz band. The IIP3 are about 6dBm in 2.2GHz band and 7.3dBm in 4.5GHz band. As shown in the measured results, the operation frequency of the front-end is shifted away from the simulated ones by a lot. The thesis runs an EM simulation with HFSS of the key high frequency signal lines, power and ground lines in the whole layout to get their electrical characteristics. In the same simulation environment, the center frequency is shifted to 2.2GHz and 4.48GHz, also the gain is a little reduced. The experiments show that the impact of the electromagnetic field characteristics of the key lines (high-frequency lines, powers and grounds lines) should be considered carefully to accurately predict the performance of RF circuits. Based on the improved RFIC design flow, the dual-band reconfigurable RF frontend is redesigned and tape out again.