Biography
Enrollment Date: 2005
Graduation Date：2008
Degree：M.S.
Defense Date：2008.05.31
Advisors：Dongmei Li
Department：Institute of Microelectronics，Tsinghua University
Title of Dissertation/Thesis：CMOS implementation of frequency synthesizer in 900MHz RFID reader
Abstract:
Abstract As a fast-developing automatic-identification technology, RFID has great application background in logistics management, Anti-counterfeiting, traffic informationization, industry automation and military affairs, now the most regarded RFID is high frequency RFID technology, especially in 860MHz~960MHz (UHF band) and 2.4 GHz. In front-end design of RFID, frequency synthesizer is the most important module. Highly integrated, power-optimized, noise-optimized frequency synthesizer could improve the system performance, satisfying the LO signal demanding of RFID. Recently there are many papers describe how to improve the performance of Frequency Synthesizer [1-3], but many of them treat the frequency synthesizer as a universal IP, my design integrated frequency synthesizer into one RFID Reader chip, and consider it from the point of whole Reader system. Firstly we do the theory analysis in how to improve the noise and power, concluding some principles of how to compromise the parameters of VCO and CP; basing on UMC 0.18 MM/RF process, then design a 900MHz Phase-Locked Loop and Frequency Synthesizer ranging from 860MHz~960MHz, with 200kHz frequency space. The circuit modules include VCO, Charge Pump, PFD, high-frequency divider and programmable frequency divider. The designing process includes single module’s design-simulation, system’s mix-simulation, PCB design. After tape-out, the test results show that it could tune the frequency from 718MHz to 915MHz, with its phase noise -124dBc/Hz in 1MHz offset, basically satisfying the demanding of cellular RFID device.