Biography
Enrollment Date: 2015
Graduation Date：2018
Degree：M.S.
Defense Date：2018.05.25
Advisors：Xian Tang
Department：Institute of Microelectronics，Tsinghua University
Title of Dissertation/Thesis：12bit 2GS/s Hybrid Structure ADC Circuit Design
Abstract:
ADC circuits was built and integrated simulation was performed. Each stage of the 12-bit 2GS/s hybird structure ADC was pre-simulated under different frequencies, amplitudes, and noises of the input signals. With an input signal of 101.56 MHz, -1 dBFS, and a sampling rate of 2 GS/s, the ENOB of the overall three-stage hybird architecture is 11.34 dB, SFDR is 80.4 dBc, and SNDR is 70.0 dB. Under the post-simulation with the SAR ADC layout, the simulation results slightly decreased.
Finally, the other content of this thesis is to propose two innovative fully dynamic comparator with offset self-calibration techniques, one is offset voltage storage calibration technology, whoes principle is investigated by theoretical analysis in detail, and Monte Carlo simulation method is used to vertify the comparator's offset calibration effect. And the principle of another fast convergence comparator with offset self-calibration circuit is introduced.