Biography
Enrollment Date: 2005
Graduation Date：2007
Degree：M.S.
Defense Date：2007.12.17
Advisors：Yongming Li Chun Zhang
Department：Institute of Microelectronics，Tsinghua University
Title of Dissertation/Thesis：Design and Implementation of a UHF RFID Reader
Abstract:
RFID (Radio Frequency Identification) is a contact-less technology that utilizes RF signal and space coupling transmission characteristic to implement auto identification of the target object. Along with the rapid development of integrated circuit design technology, RFID is more and more widely used in various aspects of human life, such as industry automation, supply chain management, transportation control and animal identification. Generally, a reader comprises of a receiver module, a transmitter module and a digital baseband module. Recently, single-chip integrated reader design has been gaining the attention of RFID researchers as it contributes much to the reduction of the cost of the RFID systems.
This thesis describes the technical principles and theoretical basis of UHF RFID system and the RFID protocols, indicates the point in the design of RFID readers, and then presents system architecture of UHF RFID readers.
At first, a board-level UHF RFID reader based on ISO/IEC 18000-6B standard is proposed with single tag read-write speed of 80bit/5ms. As the antenna is built in, and the whole machine weight is as light as 200 grams, this reader could be used in portable applications. Portability is further enhanced under single machine mode. The working frequency of the reader is 860MHz-960MHz, and interference of other signals could be avoided by frequency-hopping. Online update is supported, and the reader could accommodate other standard or multiple standards under the support of related software. The productization process of this design is ongoing. It is consultable for the single-chip integrated reader design.
Based on the board-level reader, a single-chip UHF reader is designed. This thesis presents the system architecture and some modules, which include a whole receiver and a modulator. The receiver adopts a high-linearity passive mixer. Utilizing an impedance transformation network, this mixer attains positive voltage conversion gain, which contributes much to reduce the noise figure of the whole receiver. The proposed modules are designed and implemented in a 0.18um 1P6M CMOS technology, and measurement shows good performance.