Biography
Enrollment Date: 2013
Graduation Date：2016
Degree：M.S.
Defense Date：2016.05.31
Advisors：Hanjun Jiang
Department：Institute of Microelectronics，Tsinghua University
Title of Dissertation/Thesis：Research on Key Technologies for Baseband Circuit of Low Power Bluetooth Receiver
Abstract:
Bluetooth is a short distance wireless communication. It is widely used in WPAN and WBAN. From Bluetooth mobile phone and Bluetooth earphone in the past to smart home and wearable medical devices which are major topic of discussion nowadays, Bluetooth plays an important role in our daily life. For the reason that these Bluetooth equipment are mainly battery powered, a solution to power consumption is very important. In Bluetooth 4.0 protocol, Bluetooth low energy (BLE) is proposed. Compared with traditional Bluetooth, BLE has maximum stand-by time, fast connection and low peak power consumption for transmission and reception. It reduces the power consumption in many ways, highly extending the battery life.The main work in this thesis is to design the baseband circuit in a low power Bluetooth transceiver, including intermediate frequency (IF) ADC and digital demodulator. The research is focused on some key technologies for baseband circuit design. ADC is used to convert baseband analog signal to digital signal. It is SAR ADC with eight bit resolution. The sample frequency is 8MS/s and the baseband signal is 500 kHz. The sample clock is a low frequency signal relatively, so a small leakage current can be added up to a large value in a sample phase. It may be large enough to change the switch states of MOSFET and increase the power consumption. In this thesis, the leakage current problem is optimized, ensuring the resolution of ADC and decreasing the power consumption at the same time. The function of digital demodulator is recover the 0/1 sequence from digital baseband signal. According to BLE protocol, the modulation method is GMSK with BT parameter equals 0.5, so the main work in this part is research on the GMSK demodulate algorithm and realization of the circuit. Considering the power consumption, this thesis chooses one bit differential algorithm for demodulation, and introduces how we decided the algorithm for normalization, timing and synchronization, decision and so on. Particularly, we propose a frequency offset calibration algorithm which combines one bit differential operation and CORDIC algorithm. It can deal with a baseband signal with frequency offset less than 150 kHz, and eliminate the phase offset at the same time. It lower the hardware cost by multiplexing the one bit differential operation module.The circuit in this project is implemented in tsmc 65nm CMOS process with a 1V supply voltage. The area of IF ADC circuit is 0.15mm2, and the current consumption is 150μA from the test results. The area of GMSK demodulator is 0.49mm2, and the equivalent gate number is one hundred and sixty thousand. The bit error rate (BER) reaches 10-3 according to the BLE protocol provision when the signal-to-noise ratio (SNR) is 13dB.