Location:Home > Students > Past students
Guanghua Wu

Biography

Enrollment Date: 2013

Graduation Date:2016

Degree:M.S.

Defense Date:2016.05.31

Advisors:Hong Chen

Department:Institute of Microelectronics,Tsinghua University

Title of Dissertation/Thesis:Baseband Circuits design for Micro-Power Wireless Data Transmission Protocol

Abstract:
State Grid Corporation of China has put forward smart grid strategic since May 2009. Automatic meter reading technologies play an important role for power user electric energy data acquisition. Automatic meter reading based on short-range wireless communication technology can save power line and cost of management; meanwhile it can improve the rate of energy meter reading. State Grid Corporation of China has established a protocol called Power user electric energy data acquisition system communication protocol Part 4: Micro-Power Wireless Data Transmission Protocol. This paper focuses on baseband circuits design for Micro-Power Wireless Data Transmission Protocol in wireless automatic meter reading application. Chip function definition, architecture of physical layer, MATLAB simulation, prototype, RTL simulation, FPGA verification, back end design are completed. This paper firstly introduces primary performance parameters of physical layer and the architecture of baseband circuits.The selected radio frequency bands are from 471MHz to 486MHz, the symbol rate is 10Kbps, GFSK modulation scheme is adopted. Meanwhile the data path of transmitter and receiver for baseband is introducted. This paper also proposes MATLAB simulation models. GFSK modulation is achieved using Look-up Table and Direct Digital Frequency Synthesis. The Error Vector Magnitude of GFSK modulator is 1.4%. GFSK demodulation is achieved based on arc-tangent operation and trigonometric sum and difference operation. The proposed GFSK demodulator can suffer 70K frequency offset and 1V DC offset. For 1% BER, the required Eb/N0 is 10.95dB. Prototype is demonstrated based on USRP device and LabVIEW platform of NI corporation. This paper completes RTL design and FPGA verification of baseband circuits. Baseband circuits include FIFO circuits, CRC circuits, data whiting circuits, GFSK modulator, GFSK demodulator and framing synchronizator. Back end design of baseband circuits is performed in SMIC 40 nm process, and the circuits have been taped out. This chip can be integrated in a wireless AMR SoC providing available IP for enhancing smart grid of China in the future.