Biography
Enrollment Date: 2012
Graduation Date：2015
Degree：M.S.
Defense Date：2015.06.02
Advisors：Zhihua Wang
Department：Institute of Microelectronics，Tsinghua University
Title of Dissertation/Thesis：Design on Output Stage of Implantable Neural Stimulators
Abstract:
Functional electrical stimulation (FES) has become an effective method to treat neurological diseases since 1980s. Comparing to pharmacologic treatment, FES has no side effect to patients. Now most neural stimulators on the market are powered by batteries, so problems related to lifetime of batteries have become great challenges because patients expect to reduce the frequency of surgeries which are used to replace them. One of the most effective solutions is improving output energy efficiency of output stage which always consumes most of the energy in an implantable system.
Current-mode stimulation is widely used in implantable stimulators. The quantity of charge delivered to the tissue load per stimulus pulse is easily controlled by the digital to analog converter (DAC), providing an easy method for charge-balancing. But the dropout voltage on current source is fairly large and output efficiency is extremely small when stimulus current is small, which is wasting a large amount of energy. This work uses a DAC and a DC/DC converter to produce different voltage steps according to stimulus current to improve output efficiency and diminish power consumption. DAC is connected to the reference voltage input of DC/DC converter to generate different voltage steps. Single-ended primary inductance converter (SEPIC) or charge pump can be used as DC/DC converter. Current Detection Module detects stimulus current and conveys the corresponding feedback voltage back to the MCU. If stimulus current is larger or smaller than expected, MCU will make appropriate adjustment.
Pulse width modulation (PWM) and voltage-mode control enables SEPIC to work well. Simulation showed that the stimulating voltage could change from 1.1V to 18.7V with less than 25mV ripple and the stimulus current could change from 0.7mA to 12.1mA with 0.1mA resolution. The output stage could work smoothly under the voltage supply range between 3.0V and 4.1V. The largest output efficiency is 78.6%. The output efficiency of the proposed work could keep higher than 60% when stimulus current was above 1.4mA and even higher than 70% when stimulus current was above 2.9mA. The stimulus current of this output stage is of very good linearity.
The subject circuit of charge pump is four-stage voltage doubling circuit working under pulse skip modulation (PSM). Simulation showed that the stimulus current could change from 2.8mA to 8.0mA with 0.06mA resolution. The output stage could work smoothly under the voltage supply range between 3.0V and 4.1V. The largest output efficiency is 77.0%. The output efficiency of the proposed work could keep higher than 50% when stimulus current was above 4mA. The stimulus current of this output stage is of very good linearity.
Although the characteristics of output stage based on charge pump are poorer than the output stage based on SEPIC, the former do not have external inductance, avoiding outside interference. These two structures are fabricated on two silicon chips using CSMC 1µm HV technology.