Biography
Enrollment Date: 2012
Graduation Date：2015
Degree：M.S.
Defense Date：2015.06.03
Advisors：Hanjun Jiang
Department：Institute of Microelectronics，Tsinghua University
Title of Dissertation/Thesis：Research on ECG Acquisition Low-Power Integrated Circuit
Abstract:
Electrocardiogram(ECG) acquisition devices are widely adopted in clinical care. Traditional ECG acquisition devices used in the hospital are typically designed with discrete off-the-shelf components. The application of such devices is limited because they are always bulky and power hungry. Such devices cannot satisfy personal use and support continuous monitoring. There has been a hot focus on wearable ECG acquisition systems and the key integrated circuits in academia and industry.Under the fully analysis of two architectures typically adopted in ECG acquisition, this paper designs the ECG acquisition architecture formed by low-gain amplifier, anti-aliasing filter and high-resolution ADC. A 8-channel ECG acquisition circuit is designed in UMC 180nm CMOS technology. Two op-amp instrumentation amplifiers, 24-Bit ΔΣ ADC and some auxiliary circuits are included in this chip.This paper mainly focuses on the design in low-noise instrumentation amplifier and some auxiliary circuits. Folded cascade OTA is adopted in instrumentation amplifier design and a good compromise has attached between power, noise and swing. To deal with the mains interference, the right-leg-drive circuit is used to drive the mains interference to the body in the reverse phase. The Wilson central terminal circuit is adopted to collect the remaining mains interference and export to the negative input of instrumentation amplifier. The remaining mains interference is rejected thanks to the common-mode rejection ability of instrumentation amplifier.The test results show that the power of ECG acquisition circuit is 576µW per channel. The input referred noise from 0.05Hz to 100Hz zHfof the two op-amp instrumentation amplifier is 0.49µV. With a 0.2V, 50Hz input sine wave provided by DS 360, the input referred noise from 0.05Hz to 100Hz of the ECG acquisition channel turns out 0.78µV, and the SNR is 105dB. Compared to the academic papers on ECG acquisition, this paper shows a higher SNR. Compared to the industrial chips on ECG acquisition, this paper adopts a lower power voltage. A low-power, low-noise instrumentation amplifier(IA) dedicated for electrocardiogram (ECG) and electroencephalogram(EEG) acquisition systems is followed next. A DC-coupled current-feedback structure is adopted in this paper. The output voltage range is expanded to rail-to-rail by adding a novel level shifting circuit between the forward amplifier and the feedback network. A background digitally-assisted offset calibration method is designed to calibrate the differential electrode offset, and offset up to 3.1mV can be calibrated out under a gain setting of 57dB. The current-feedback IA is designed in a standard 0.18 μm CMOS technology. The input referred noise of the IA is 1.5 μVrms (0-100Hz). The total current consumption is 1.7 μA from a 1.8 V supply.