Biography
Enrollment Date: 2011
Graduation Date：2014
Degree：M.S.
Defense Date：2014.05.27
Advisors：Chun Zhang
Department：Institute of Microelectronics，Tsinghua University
Title of Dissertation/Thesis：Digital circuit design for PMSM control chip apply to UAV
Abstract:
Unmanned Aerial Vehicle (UAV) is very popular in recent years, due to broad application prospect in military, civil and other fields, it’s became ' research hot spot in many countries. Because of the major power consumed on the drive motor, multi rotor unmanned aircraft has a weak battery life at present, the driving system of multi rotor unmanned aircraft are composed of brushless dc motor, in consideration of the motor efficiency, this paper proposes using the permanent magnet synchronous motor to drive multi rotor unmanned aircraft instead of brushless dc motor. In view of the permanent magnet synchronous motor control complexity and the UAV development cycle, focus on UAV’s cruising ability and large-scale application in the future, this paper presents a vector control integrated circuit(IC) for permanent magnet synchronous motor (PMSM) applied to unmanned aerial vehicle.
Firstly, this paper completed the chip modular division based on PMSM control function, define the chip function, and design the chip architecture. The vector control system includes SVPWM, vector coordinate transformation, PI controller, rotor angle, speed measurement, AD interface and SPI interface. These modules are working cooperatively, and controlled by the global control unit.
Secondly, vector control algorithm was introduced, which include the mathematical model and structure of permanent magnet synchronous motor. Combined with the structure of the motor model, space voltage vector, space vector pulse width modulation (SVPWM), the principle of coordinate transformation and vector control algorithm were presented. Described the motor current and speed double closed loop control method. The vector control algorithm is simulated by the Simulink in terms of speed response, motor electromagnetic torque response and the output current performance. The motor output current is smooth, the electromagnetic torque is steady, and the speed reaches set speed within 15ms.
Thirdly, design specification of the chip was presented, all of the modules were implemented with pure hardware and designed with Verilog hardware description language (HDL), meanwhile top-down and modular partitioning logic optimization design were adopted. The circuit was verified by FPGA combined with the power board and AD conversion board, the verification results show that the employed motor running smooth and generate low noise, meanwhile, the proposed design only occupy few the logic resources, less than many other design.
Finally, using 0.18 um standard CMOS process to complete the chip back-end design, the die size is 1266um*1280um, and the layout area is 872um*885um.