Biography
Enrollment Date: 2010
Graduation Date：2016
Degree：Ph.D.
Defense Date：2016.05.28
Advisors：Woogeun Rhee
Department：Institute of Microelectronics，Tsinghua University
Title of Dissertation/Thesis：Research on Key Techniques of Radar Transceiver for Vital Sign Detection
Abstract:
With the rapid development of mobile healthcare, medical monitoring, WBAN and other applications, the radar sensor for noncontact vital sign detection has received great research attentions. Among several different radar transceiver architectures, the pulse based radar becomes one of the most promising techniques because of low power, high resolution, simple structure and good immunity to the multipath problem. Moreover, the development of CMOS technology provides a way of designing low-cost radar transceiver SoC. Therefore, key techniques in the design of short-range radar transceivers for vital sign detection are researched in this dissertation.
To achieve better resolution in radar systems with lower cost, a novel TDC based digital beamforming method is proposed. Based on existing design, a four-channel FMCW radar receiver has been implemented in 0.18m CMOS. For vital sign detection, the proposed architecture can perform either vector summation (beamforming) or scalar summation (beamsumming) in the digital domain by simply weighting or removing the dc term for each channel, thus not requiring analog delay circuits. According to the measurement results, the prototype four-channel radar receiver provides a 5.7-dB SNR enhancement and spatial selectivity, which successfully demonstrates the beamforming operation. The measured detection precision is 0.75 cm, and the measured half-power bandwidth is 52°. The receiver consumes 33.2 mW/Channel from a 1.8-V supply.
For radar transceiver design, lower power consumption and better robustness are required by mobile healthcare applications and complicated wireless environment. Therefore, a low power interference-robust pulse based radar transceiver for noncontact vital sign detection is designed and implemented in 65nm CMOS. A duty-cycled scheme is proposed in the front-end circuit design to significantly reduce power consumption. Occupying 3-to-5 GHz band with four 500 MHz sub-channels, the radar mitigates the narrowband interference (NBI) problem with the frequency-domain oversampling scheme. In the time domain, the TDC is employed to achieve fine ranging resolution with noise shaped oversampling. The die area is 3.08 mm2, and the PRF is 1 MHz. The proposed radar transceiver achieves a detection precision of 5.68 mm and a max detection range of 0.6 m with a power consumption of 17.2 mW from 1.0-V supply when the duty cycles of 40% and 20% are used for the transmitter and the receiver respectively.