Biography
Enrollment Date: 2010
Graduation Date：2013
Degree：M.S.
Defense Date：2013.05.29
Advisors：Dongmei Li Liyuan Liu
Department：Institute of Microelectronics，Tsinghua University
Title of Dissertation/Thesis：Design and Implement of an A/D Converter based on Compressed Sampling
Abstract:
With the development of the field of communication and the modern microelectronic technology industries, information acquisition, data processing, transmission, and the amount of information stored are growing. In the process that original analog converted to the digital information, the constraints which Nyquist sampling on the amount of data and the transmission speed have become increasingly evident. Excessively high sampling rate will increase the difficulty of the circuit, resulting in the decrease of the quantization accuracy; massive data collection will cause the calculated amount is excessively increased, and the waste of resources. Compression sampling theory is a method for signal sparse conditions, by reducing the sampling rate, the purpose to improve the data storage and transmission speed. This thesis based compression delta-sigma multiple sampling analog-to-digital converter design and implementation. The main work of the paper includes: Research and analysis; study and research on the theory and technology development status compressive sampling theory, including the sparse representation of the original signal, sensing matrix (measurement matrix) and recovery algorithm; correlation algorithm analysis, the study identified based on compressive sampling multiple delta-sigma ADC structure and implementation; complete the delta-sigma ADC key modules, system-level simulation, circuit design and layout. The important module circuit includes a clock generator, an integrator, a quantizer, and a linear feedback shift register; using a dynamic element matching techniques. Achieve a chip on the UMC180nmCMOS process implementation and testing of the samples. The test signal frequency is 200 kHz, the sampling clock is 1MHz, analog and digital supply voltage is 1.8V and 3.3V. The test results demonstrate the effectiveness and feasibility of the design based on the compressed sampling analog-to-digital converter. The paper gives the analysis of test results and further improvements.