Biography
Enrollment Date: 2010
Graduation Date：2013
Degree：M.S.
Defense Date：2013.05.29
Advisors：Woogeun Rhee
Department：Institute of Microelectronics，Tsinghua University
Title of Dissertation/Thesis：Low Power Wide Tuning Range PLL Design for UWB Receiver System
Abstract:
This thesis explores the design of high frequency wide tuning range Phase-Locked Loop (PLL) for Ultra-Wideband (UWB) transceiver application. This component consists of Intermediate Frequency Phase-Locked Loop (IFPLL) and Radio Frequency Phase-Locked Loop (RFPLL) is critical in Impulse-Radio UWB (IR-UWB) transceivers, and a low power low cost design is sought without impairing the functionality and performance. The IFPLL with a low power consumption and low phase noise performance are targeted. Especially, the implementation of a high frequency, wide tuning range and small frequency step Digitally-Controlled Oscillator (DCO) is investigated for a small area integration and low power consumption that can be scaled with the duty cycle.
Firstly, the bottle neck of process and difficulties of circuit design in high frequency, wide tuning range and small frequency step DCO are pointed out and several solutions are proposed and compared.
Secondly, a low phase noise moderate tuning range ring oscillator is presented for IFPLL. The total power consumption is about 0.62 mW while phase noise is below -100dBc/Hz @ 1MHz.
Lastly, a RFPLL with a dual-band high frequency resolution DCO structure and loop switch is implemented in TSMC CMOS 65 nm for 3.1~10.6GHz IR-UWB applications. The combination structure of LC oscillator and Injection-Locked Oscillator (ILO) to offer quadrature output is demonstrated.