Biography

Enrollment Date: 2010

Graduation Date：2013

Degree：M.S.

Defense Date：2013.05.29

Department：Institute of Microelectronics，Tsinghua University

Title of Dissertation/Thesis：A Power-Scalable Reconfigurable Active-RC Complex Band-pass Filter for a Multimode GNSS Receiver

Abstract:
With the continuous development of CMOS technology, the performance requirement of navigation chip is getting higher and higher, driving the navigation chip to multi-mode, high sensitivity, high integration and low power. As to GNSS receiver chip, to achieve multi-mode and high integration level, the filter should be able to provide various frequency selections. To achieve high sensitivity, the filter should have a high image rejection ratio. To achieve low power consumption, the embedded amplifier should be implemented with optimized power. Therefor the research of a power-scalable reconfigurable active-RC complex band-pass filter for a multimode GNSS receiver is meaningful. A power-scalable reconfigurable complex band-pass filter for a multimode Global Navigation Satellite Systems (GNSS) receiver is presented in this thesis. The filter can be reconfigured to operate in either fifth-order or third-order mode. The intermediate frequency varies among 3.996, 4.8, 6, 7.161, 10.326, 12, 13.29 and 16MHz. The bandwidth varies among 2.2, 4.2, 6, 10 and 20MHz. An operational amplifier with power-scalable technique is adopted to lower down the power consumption. And an automatic tuning circuit is utilized to guarantee the accuracy of intermediate frequency and bandwidth. Finally the measurement results of the chip verify the accuracy of every frequency modes, and they also verify the function of a complex band-pass filter that it can reject the image signals. During the test of image rejection ratio, an auto-calibration technique has been adopted employing FPGA. Test results show that this technique is stable and reliable. The filter has been implemented in 180nm CMOS process, which occupies 1240×600μm2 die area and consumes 3.6mA-8.5mA current from a 1.7V power supply provided by an on-chip LDO.

Publications

Papers：：

[1] Nan Qi,Baoyong Chi,Yang Xu,Zhou Chen,Jun Xie,Zheng Song,Zhihua Wang, A 180nm fully-integrated dual-channel reconfigurable receiver for GNSS interoperations, ESSCIRC 2013, pp. 177 - 180, 2013.

[2] Nan Qi,Baoyong Chi,Yang Xu,Zhou Chen,Jun Xie,Yang Xu,Zheng Song,Zhihua Wang, An asymmetric dual-channel reconfigurable receiver for GNSS in 180nm CMOS, CICC 2013, pp. 1 - 4, 2013.

[3] Yang Xu,Nan Qi,Zhou Chen,Baoyong Chi,Zhihua Wang, A hybrid approach to I/Q imbalance self-calibration in reconfigurable low-IF receivers, ISCAS 2012, pp. 552 - 555, 2012.

[4] Zhou Chen,Yang Xu,Nan Qi, A Power-Scalable Reconfigurable Active-RC Complex Band-pass Filter for a Multimode GNSS Receiver, ICSICT 2012, pp. 1 - 3, 2012.