Biography
Enrollment Date: 2009
Graduation Date：2012
Degree：M.S.
Defense Date：2012.05.25
Advisors：Liji Wu
Department：Institute of Microelectronics，Tsinghua University
Title of Dissertation/Thesis：Signal Integrity Analysis in 32-bit CPU Based SiP
Abstract:
With the improvement of electronic product requirements，the integrated circuit industry has been promoted rapidly in recent decades. The integrated circuit develops constantly towards the direction that with the feature of high speed, high density, miniaturization and systematic. SiP (System in Package) is a new technology which fits the trend greatly. With the constant improvement of the signal frequency, signal integrity has become an important factor which will influence the function of product significantly.
Based on a practical SiP example, this paper researches the signal integrity (SI) problem of interconnect. The simulation and test on both the reflection and crosstalk are studied. The main content of the paper are as follows.
(1) The signal reflection of the network in package is studied. The causes of the reflection are exposed and typical network which is easy to cause the reflection is modeled and simulated under EDA software of Cadence SiP. The effective method to restrain the reflection is showed and simulated based on the practical examples. A mixed method of impedance matching is designed which gives a satisfying waveform and reduces overshoot by 98.68% and undershoot by 79.26% compared with the situation without impedance matching.
(2) The crosstalk between networks is studied as well. The causes of crosstalk are exposed first and some typical situation is simulated in Cadence SiP. A typical method to control the crosstalk which places a ground wire between two signal lines is simulated and the crosstalk is reduced about 50%.
(3) The practical SiP samples are tested, including the function test and the performance test. To the chips whose function is correct, the RC impedance matching is used and reduces the overshoot by 40.91% in high voltage and by 54.55% in low voltage. To the chips whose function is wrong, the waveform is explored and analysis is done to determine whether SI is the reason or not
The aims of this paper are to see how the factors influence the signal integrity in SiP through the modeling, simulation and test and to find out the effective methods to retrain the reflection and crosstalk. The modeling and simulation are based on the software Cadence SiP and the test board is supplied by Loongson Corporation.