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Ying Cheng

Biography

Enrollment Date: 2008

Graduation Date:2011

Degree:M.S.

Defense Date:2011.05.24

Advisors:Fule Li

Department:Institute of Microelectronics,Tsinghua University

Title of Dissertation/Thesis:Critical Technology Research for Transmitter System of High-Speed Serial Link

Abstract:
This thesis has discussed critical technology of transmitter system of high speed serial link. The background of high speed serial interface is introduced, including the development of high speed serial interface from start to nowadays. Besides, fundamental theories on signal integrity and transmission line are discussed in brief. A CMOS transmitter circuit which has the data transmission speed of 4.8Gb/s for a single lane and 24Gb/s for total is presented. This paper describes the design features of a channel, of which the design of each module a detailed description, including clock generation, impedance matching, the sender balanced interface driver, and briefly describes the bandgap reference, and digital modules. The sending system uses the TSMC 65nm CMOS process design, after layout simulation, the system function properly to meet the requirements of pre-set targets.