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Zhangcheng Yao

Biography

Enrollment Date: 2007

Graduation Date:2010

Degree:M.S.

Defense Date:2010.06.04

Advisors:Chun Zhang

Department:Institute of Microelectronics,Tsinghua University

Title of Dissertation/Thesis:Research on CMOS implementation of Software Defined Radio Front-End

Abstract:
With the growing of wireless communication, Software Defined Radio becomes a hot issue. This system requires an RF front-end with wide bandwidth, low noise, high linearity, flexibility and reconfiguration, but the CMOS implementation of this system is a tough challenge. This dissertation proposes a key research on CMOS implementation of an interference canceller and wideband low noise amplifier for the RF front-end of the Software Defined Radio. The double-loop interference cancellation is a solution to substitute the conventional SAW filter to implement in the same chip with the transceiver, because this adaptive notch filter can be programmed with the center frequency band. The problem of this cancellation technique is the implementation of the delay cell by CMOS process. In this dissertation, the low-Q-value LC tanks can be used as the delay cell in the Digital TV band (400MHz-800MHz). This dissertation also provides a solution which can cancel the interference by the amplitude and the phase around the center frequency of the LC tank. The modified Gilbert cell can be used as the adder and the subtractor by transferring the voltage to the current. The double notch can be obtained and programmed by adjusting the capacitor of the series and parallel LC tank simultaneously. The maximum interference suppression can be achieved by 18dB by simulation. Moreover, the difficulties of the low noise amplifier for the Software Defined Radio front-end are the wideband impedance matching and the low noise beyond 5.0GHz. This dissertation proposes a low noise amplifier design based on shunt-shunt active feedback technique. The design is implemented by SMIC 0.13um CMOS process and simulated. The circuit satisfies the impedance matching requirement from 200MHz to 5.0GHz, and achieves the minimum Noise Figure of 2.6dB, the gain of over 18.8dB, the flatness of 1.2dB attenuation beyond 5.0GHz (with the mixer load) and the IIP3 of -7.5dBm (@ 950MHz). This circuit has the power dissipation of 19.2mW (with differential structure) at the supply of 1.2V and the area of 0.8mm×0.75mm. This design of the low noise amplifier covers the whole band itself, reducing the number of multi-low noise amplifiers for the software defined radio and saving the power dissipation and the area.