Biography
Enrollment Date: 2007
Graduation Date：2010
Degree：M.S.
Defense Date：2010.06.11
Advisors：Chun Zhang
Department：Institute of Microelectronics，Tsinghua University
Title of Dissertation/Thesis：Design of UHF RFID Reader
Abstract:
RFID (Radio Frequency Identification) is a technology utilizing RF signal to identify objects and acquire information. RFID system is widely used in areas such as logistics, identification and traffic control. Recent years, due to the outcome of “Internet of Things”, RFID technology has attracted more and more people’s attention. Compared with low frequency, ultra high frequency(UHF) RFID has the advantages of long distance, more secure and fast speed, which make it gain more concern in “Internet of Things”. This thesis introduces the basic structure of RFID system and communication protocol. Basing on the basic knowledge, the calculation method of communication distance in UHF RFID system is described, which provides the theoretical foundation for the design of RFID reader. This thesis discusses the problems of “LO-leakage” and “Blind Point” which exist in UHF RFID receivers and proposes the solution methods. According to these methods, a low power receiver utilizing passive mixers as RF front end and IQ down-conversion structure is designed. The input 1dB compression point of the RF front end is 5dBm so the problem of LO-leakage is solved. The “Blind Point” problem is also solved due to the IQ structure which can guarantee there is always one path working regularly. The test result shows the sensitivity of the receiver is -55dBm and the power consumption is 1.89mW. Basing on the receiver, a UHF RFID reader in accordance with ISO18000-6C is implemented, which can be used in portable RFID system. The digital baseband, PLL (phase lock loop), receiver, transmitter and LDO(low drop regulator) are all integrated in one single chip with the size of 4mm*4mm. The 8051 core, program memory and data memory are all inside the digital baseband except a flash module which is outside chip. The PLL is a integer one with a external crystal oscillator of 13MHz. The channel spacing of the PLL is 200KHz, and the lock range of the PLL is from 760MHz to 980MHz covering the whole frequency range defined in protocol. The transmitter is made up by a ASK modulator and a two stage class E power amplifier which can work in either ASK or OOK mode. The output power of the amplifier is 14.7dBm. A lot of LDO modules are integrated in this chip for the power supply of each block, solving the problem of excessive pins and high cost. The whole chip only needs a power supply within 3.3V to 5.0V to complete its function. The method of digital tuning is used in the design of LDO to conquer the problem of process deviation and the output voltage of LDO can be directly adjusted by software. This chip is verified in 0.18 um CMOS technology, the test results show that it can satisfy the requirements of portable UHF RFID system both in function and performance.