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Chengwen Liu

Biography

Enrollment Date: 2007

Graduation Date:2010

Degree:M.S.

Defense Date:2010.06.03

Advisors:Woogeun Rhee

Department:Institute of Microelectronics,Tsinghua University

Title of Dissertation/Thesis:The FIR filtering method for quantization noise reduction in DCO and its application

Abstract:
Abstract PLL is a foundamental building block in wireless/wireline communication systems. Compared to earlier analog PLLs, their digital counterparts exhibit several advantages, including compactness, immunity to supply noise, insensitivity to process parameters, direct migration between technology nodes. Thus DPLL addressed more and more research and application in recent years. Digitally controlled oscillator, commonly referred to as " DCO", is a critical building block in DPLL, for its phase noise and spur performance is determinative for the loop. To increase tunning resolution, ΔΣ modulator is introduced into the loop. Meanwhile, quantization noise is also introduced to the loop, deteriorating phase noise at high frequency offset. In another word, short-term jitter is increased in time domain. The feature of DPLL and DCO is briefly presented is this thesis. Hybrid FIR filtering method is introduced to DCO, based on analyzing the effect of high frequency quantization noise of ΔΣ modulator on the short-term jitter of DCO. Since this method operates in discrete-time domain, this method is immune to analog mismatch. Also, this method offers unit DC gain, which avoided noise amplification problem. In circuit implementation, this FIR technology employs parallel operation, having no additional latency. Low hardware cost is required in this technology. In this thesis, this hybrid FIR filtering method is verified theoretically. Behavior simulation is done by comparing high frequency phase noise of one DCO based PLL under two circumstances, one with this technology and one without. The analysis verified that high frequency quantization noise of DCO is effectively reduced. Also, testing result of one integer-N PLL fabricated in UMC0.18um technology employing this method demonstrated that this method is feasible for high frequency quantization noise reduction of DCO. This quantization noise reduction method is suitable for many PLL systems employing DCO, including Hybrid PLL. In the work of a Hybrid PLL implemented in UMC0.18um, this method is employed.