题目/Title：A 24–30-GHz Four-Element Phased Array Transceiver With Low Insertion Loss Compact T/R Switch and Bidirectional Phase Shifter for 5G Communication
作者/Author：
Xiangrong Huang, Haikun Jia, Shengnan Dong, Wei Deng, Zhihua Wang, Baoyong Chi
期刊/Journal：IEEE Transactions on Very Large Scale Integration (VLSI) Systems
年份/Issue Date：2023Sept.
卷（期）及页码/Volume（No.）&pages：Vol.31, No.11, pp.1839-1851
摘要/Abstract：
This article presents a compact 24–30-GHz four-element phased-array transceiver (TRx) front-end (FE) for 5-G communications. A compact T/R switch co-designed with power amplifier’s (PA) output matching network and low-noise amplifier’s (LNA) input matching network is proposed. Leveraging the transformers in the two matching networks, only one extra transistor switch is needed, which greatly reduces the chip area consumption and therefore the insertion loss. A bidirectional phase shifter composed of a two-stage polyphase filter (PPF) and two bidirectional variable-gain amplifiers (BVGA) is shared by both TX and RX. The 24–30-GHz four-element TRx FE is implemented in 65-nm CMOS process. The TX path including the power splitter and T/R switch achieves a measured 11.5-/16.5-dBm OP1dB/PSAT with 12.2%/22.9% PAE $_{\mathrm {1 dB}}$ /PAEMAX with 35.1-dB gain. The RX path including power combiner, T/R switch, and off-mode PA achieves a minimum 5.1-dB noise figure (NF) with 25.8-dB gain. The TX and RX paths achieve 5.625° phase resolution with $ < 2^{\circ }$ /0.4-dB rms phase/gain error as well as 30.6-dB gain control range with 0.5-dB gain step and $ < 1.5^{\circ }$ /0.26-dB rms phase/gain error over 24–30 GHz. Under the 64-QAM fifth-generation (5G) NR FR2 orthogonal