题目/Title：A 5.4GHz ΔΣ Bang-Bang PLL with 19dB In-Band Noise Reduction by Using a Nested PLL Filter

作者/Author：
                        Xiaohua Huang,Bowen Wang,Woogeun Rhee,Zhihua Wang

会议/Conference：VLSI-DAT 2020

地点/Location：Hsinchu, Taiwan

年份/Issue Date：2020.10-13 Aug.

页码/pages：pp. 1 - 2

摘要/Abstract：
This paper presents an in-band noise reduction method for 螖危 fractional-N bang-bang phase locked loops (BBPLLs) by using a nested integer-N BBPLL in the feedback path that works as a phase-domain low-pass filter (PDLPF). A prototype 5.4GHz 螖危 fractional-N BBPLL is implemented in 65nm CMOS. The proposed 螖危 fractional-N BBPLL achieves the in-band noise reduction of 19dB when the PDLPF is enabled. Experimental results show that the PDLPF method is useful for the 螖危 fractional-N BBPLL not only to suppress the out-of-band noise but also to mitigate the in-band noise degradation.