题目/Title：基于以太网10Gbase-R协议的PCS层设计
                        Design of the Physical Coding Sublayer Based on the Ethernet 10Gbase-R Protocol

作者/Author：杨钞翔,孔宪伟,栾文焕,张远航,王志军,张春,王自强
                        Chaoxiang Yang,Xianwei Kong,Wenhuan Luan,Yuanhang Zhang,Zhijun Wang,Chun Zhang,Ziqiang Wang

期刊/Journal：微电子学与计算机 Microelectronics & Computer

年份/Issue Date：2019.Feb.

卷（期）及页码/Volume（No.）&pages：Vol.36, No.2, pp. 16-20

摘要/Abstract：
随着网络技术的飞速发展,以太网技术凭借其优良特性已经成为当今使用最广泛的局域网技术,以太网标准包含多种协议构成完整体系,10Gbase-R协议作为其中重要的基础协议得到重视.本文基于10Gbase-R协议的PCS层,深入探究PCS层内部关键模块:弹性缓冲器、64B/66B编解码器、加解扰码器、位宽转换器等,提出完整设计架构,使用verilog语言完成其RTL级模块设计,搭建仿真验证平台,使用Modelsim软件进行功能验证,完成了相关设计.
With the rapid development of network technology,Ethernet technology has become the most widely used local area network technology with its excellent features.The Ethernet standard consists of multiple protocols to form a complete system.The 10 Gbase-R protocol is one of the important basic protocol.This article is based on the PCS layer of the 10 Gbase-R protocol,and deeply explores the key modules within the PCS layer:elastic buffers,64 B/66 Bcodecs,scrambler/descrambler,bit-width converters,etc.It proposes a complete design architecture,and uses the verilog language to complete the RTL-level module design,then builds simulation verification platform and uses modelsim software to complete the functional verification,and completes related design.