题目/Title：A Study of Process/Device/Layout Co-Design for Full-Chip ESD Protection in BCD Technology

作者/Author：朱瑞,姚飞,王世军,王自惠,乌力吉,张向明,池保勇
                        Rui Zhu,Fei Yao,Shijun Wang,Albert Wang,Liji Wu,Xiangming Zhang,Baoyong Chi

会议/Conference：ICSICT 2012

地点/Location：Xi'an, China

年份/Issue Date：2012.29 Oct.-1 Nov.

页码/pages：pp. 1 - 3

摘要/Abstract：
A study of process-device-layout co-design procedure for full-chip electrostatic discharge (ESD) protection design for high-voltage (HV) ICs in a Bipolar-CMOS- DMOS (BCD) technology is reported. The full-chip ESD protection scheme includes I/O and power clamp ESD protection. Co-design using mixed-mode TCAD ESD simulation technique ensures design optimization and prediction. Test result confirms full-chip ESD protection of at least 4.5KV.