题目/Title：A 22.4 μW 80dB SNDR ΣΔ modulator with passive analog adder and SAR quantizer for EMG application

作者/Author：
                        Zhijie Chen,Yang Jiang,Chenyan Cai,He-Gong Wei,Sai-Weng Sin,U. Seng-Pan,Zhihua Wang,R.P. Martins

会议/Conference：A-SSCC 2012

地点/Location：Kobe, Japan

年份/Issue Date：2012.12-14 Nov.

页码/pages：pp. 257 - 260

摘要/Abstract：
A Feed-Forward (FF) multi-bit ΣΔ modulator with passive analog adder and 4-bit Successive Approximation (SA) quantizer is presented. The modulator covers the 10KHz bandwidth according to electromyography application. The design utilizes the same DAC array of the SAR quantizer to realize analog summation for the FF signal, which significantly reduces the power dissipation and the silicon area. The modulator operates at 1MS/s with IV supply. The prototype chip implemented in 65nm CMOS achieves 80dB SNDR and 81dB DR with 22.4μW power consumption. The Figure of Merit (FoM) is 0.13 pJ/conv.-step.