题目/Title：带有DCOC结构的中频可编程增益放大器
                        Intermediate Frequency Programmable Gain Amplifier with DC Offset Cancellation Loop

作者/Author：陈曦,王自强,张春,王志华
                        Xi Chen,Ziqiang Wang,Chun Zhang,Zhihua Wang

期刊/Journal：半导体技术 Semiconductor Technology

年份/Issue Date：2009

卷（期）及页码/Volume（No.）&pages：Vol.34, No.10, pp. 1041 - 1045

摘要/Abstract：
介绍了一种用于射频识别接收机、能有效消除直流失调的中频可编程增益放大器。单级放大器的仿真结果可提供-10～20dB的增益控制范围,增益步长为2dB,增益误差小于0.3dB。通过在直流失调消除环路中增加一级滤波器的方法,有效地降低了直流失调和低频噪声,在40kHz工作频率下等效输入噪声电压38.04nV/√Hz,直流失调消除电路可将输出直流失调量抑制在输入失调量的2%范围以内。电路采用0.18μm1P6MCMOS工艺实现。
A novel DC offset cancellation programmable gain amplifier was presented for RF identification receiver in 0.18 μm 1P6M CMOS process.The single-stage PGA exhibits-10 to 20 dB gain range with 2 dB step and 0.3 dB gain error.The DC offset is observed as 2% and 39.4 nV/√Hz input referred noise at 40 kHz is achieved at the same time by inserting a filter in the DCOC loop.