题目/Title：Analysis and Design of a Fully Integrated SoC for UHF RFID Reader in CMOS Technology

作者/Author：王敬超,张春,池保永,王志华
                        Jingchao Wang,Chun Zhang,Baoyong Chi,Zhihua Wang

会议/Conference：ASICON 2009

地点/Location：Changsha, Hunan

年份/Issue Date：2009.20-23 Oct.

页码/pages：pp. 415 - 418

摘要/Abstract：
This paper presents a fully integrated single-chip UHF radio frequency identification (RFID) reader SoC for short distance handheld applications. The SoC integrates all building blocks—including an RF transceiver, a PLL frequency synthesizer, a digital baseband and a MCU—in a 0.18um CMOS process. A high-linearity RX front-end and a low-phase-noise sythesizer are designed to handle the large self-interferer. A class-E power amplifier with high power efficiency is also integrated to fulfill the function of a RFID reader. The chip has a die area of 5.1mm*3.8mm including pads.