题目/Title：Design Methodology of Low Power JPEG2000 Codec Exploiting Dual Voltage Scaling

作者/Author：
                        Yicong Meng,Leibo Liu,Li Zhang,Zhihua Wang

会议/Conference：ASICON 2005

地点/Location：Shanghai, China

年份/Issue Date：2005.24-27 Oct.

页码/pages：pp. 183 - 186

摘要/Abstract：
This paper proposed a novel dual voltage scaling layout architecture and a design methodology of low power JPEG2000 codec exploiting dual voltage scaling. Fabricated in SMIC 0.18μm 1P6M standard CMOS technology, this codec is capable of JPEG2000 compression/decompression with a 1280×1024 pixel (YUV422 full color) at 20 frames/s employing 100MHz operation frequency. And the power consumption is 465mW @ 1.8V and 100MH. Applied with dual voltage scaling technique, the power dissipation is reduced by 28.5%.