Title：A high speed combiner
Country：China
Patent No.：201611104765.5
Legal Status：Authorized
Inventor：Fangxu Lv, Ziqiang Wang, Chun Zhang, Zhihua Wang, Fule Li
Assignee：Tsinghua University
Address：Tsinghua University,Haidian District Beijing 100086, China
Filing Date：2016-12-05
Issue Date：2019-07-12
Abstract：
The invention relates to a high-speed combiner, applied to a high-speed serial interface and belongs to the field of analog circuit design. The combiner functions in four-way parallel differential data input and one-way differential data output. The combiner comprises four modules for processing single-way input data. Each module is equipped with two orthogonal clock input ends. Auxiliary MOS transistors are added to the modules. Parasitic capacitors of key nodes can be pre-charged at a rising edge of a first clock, thereby improving the speed from first clock input to data output, reducing the delay mismatch between the first and second clock input to the data output, and reducing the intersymbol interference of the output data of the combiner.
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