Title：Phase-locked-loop circuit including digitally-controlled oscillator
Country：USA
Patent No.：US8368440 B2
Legal Status：Authorized
Inventor：Woogeun Rhee, He Rui, Xueyi Yu, Tae-Young Oh, Joo-Sun Choi, Zhihua Wang
Assignee：Samsung Electronics Co., Ltd.; Tsinghua University
Address：
Filing Date：2011-11-08
Issue Date：2013-02-05
Abstract：
A phase-locked-loop (PLL) circuit is provided. The PLL circuit includes a phase/frequency detector, a digital filter, a digital low pass filter (LPF), a digitally controlled oscillator (DCO), and a frequency divider. The digital LPF performs a low-pass-filtering on least significant bits of first digital data in a digital mode and generates filtered second digital data. The DCO performs a digital-to-analog conversion on the second digital data and most significant bits of the first digital data to generate a first signal, generates an oscillation control signal based on the first signal, and generates an output clock signal oscillating in response to the oscillation control signal.
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