Title：Delay locked loop using hybrid FIR filtering technique and semiconductor memory device having the same

Country：USA

Patent No.：US8310886 B2

Legal Status：Authorized

Inventor：Woogeun Rhee, Xueyi Yu, Sung Cheol Shin, Zhihua Wang

Assignee：Samsung Electronics Co., Ltd.; Tsinghua University

Address：

Filing Date：2010-06-28

Issue Date：2012-11-13

Example embodiments are directed to a delay locked loop (DLL) circuit based on a hybrid finite impulse response (FIR) filtering technique, and a semiconductor memory device including the DLL circuit. The DLL circuit includes a frequency divider and a self-referenced multiphase generator (SRMG) and allows a Sigma-Delta (ΣΔ) modulator to operate at a low frequency without generating false lock and glitch noise.

Patent Certificate： PDF/Jpg