题目/Title：A Flash ADC with low offset dynamic Comparators

作者/Author：刘佳,李福乐,李玮韬,姜汉钧,王志华
                        Jia Liu,Fule Li,Weitao Li,Hanjun Jiang,Zhihua Wang

会议/Conference：EDSSC 2017

地点/Location：Hsinchu, Taiwan

年份/Issue Date：2017.18-20 Oct.

页码/pages：pp. 1 - 2

摘要/Abstract：
This paper presents a Flash ADC with low offset dynamic comparators using an offset cancellation technique. By dynamically storing the comparator offset on the input capacitors, the offset is suppressed mostly. Two 5-bit 160MS/s Flash ADCs (Flash-A using the proposed offset cancellation technique and Flash-B without cancellation) are fabricated in 65nm CMOS for comparison. The measure results show that, the DNL is reduced from 1.32LSB to 0.62LSB and the INL is reduced from 1.20LSB to 0.55LSB. The SNDR improves from 26.25dB to 29.63dB and the SFDR improves from 35.02dB to 43.61dB. And the power increases from 3.44 mW to 3.79 mW.