题目/Title：A Hybrid Loop Two-Point Modulator Without DCO Nonlinearity Calibration by Utilizing 1 Bit High-Pass Modulation

作者/Author：徐妮,李宇根,王志华
                        Ni Xu,Woogeun Rhee,Zhihua Wang

期刊/Journal：IEEE Journal of Solid-State Circuits

年份/Issue Date：2014Oct.

卷（期）及页码/Volume（No.）&pages：Vol.49, No.10, pp. 2172 - 2186

摘要/Abstract：
This paper presents a two-point modulator architecture which is immune to the nonlinear effect of the digitally-controlled oscillator (DCO). By utilizing a 1-bit  modulation with embedded finite-impulse response (FIR) filtering, the high-pass modulation path does not suffer from the DCO gain nonlinearity, thus requiring absolute gain calibration only. The digital FIR filter in the high-pass modulation path not only suppresses quantization noise but also reduces noise coupling with time-interleaved switching of partitioned capacitors. A hybrid FIR filtering method is also employed for the low-pass modulation path to enhance the linearity of the fractional-N phase-locked loop (PLL). A 1.8 GHz two-point modulator based on a semi-digital PLL is implemented in 65 nm CMOS, consuming 6.9 mW from a 1 V supply. At the divide-by-2 output frequency of 913.2 MHz, the error-vector magnitude (EVM) values of 1.79% and 1.63% are achieved with 1.08 Mb/s and 270 kb/s GMSK modulation, respectively. When the 1.08 Mb/s GFSK modulation is performed with the same PLL parameters, the EVM value of 1.96% is achieved.