题目/Title：A 1V 15-bit Audio ΔΣ ADC in 0.18µm CMOS

作者/Author：
                        Liyuan Liu,Dongmei Li,Liangdong Chen,Yafei Ye,Zhihua Wang

会议/Conference：ISCAS 2011

地点/Location：Rio de Janeiro, Brazil

年份/Issue Date：2011.15-18 May

页码/pages：pp. 510 - 513

摘要/Abstract：
In this paper a 1V 15-bit DS ADC for audio application is presented. Second order modulator with feed-forward path is adopted in order to reduce the swing of each integrator. Non-linear gain effect is mitigated. Single stage amplifier with high power efficiency is employed to save power. Decimation filter is implemented with seven-stage cascade sub-filters. Timing multiplexing and resource reuse methodology are employed for low hardware cost. The ADC is programmed to adapt 4K 8K 16K applications. Over 90dB SNDR performance can be achieved under various bandwidths while the total power dissipation is 360uW. The modulator occupies 0.3mm2 and decimation filter occupies 0.2mm2.