题目/Title：
                        An ultra-low-power 1Kb Sub-threshold SRAM in 180nm CMOS Process

作者/Author：刘鸣,陈虹,李长猛,王志华
                        Ming Liu,Hong Chen,Changmeng Li,Zhihua Wang

期刊/Journal：半导体学报 Chinese Journal of Semiconductors

年份/Issue Date：2010

卷（期）及页码/Volume（No.）&pages：Vol.31, No.6

摘要/Abstract：

This paper presents a 1Kb Sub-threshold SRAM in 180nm CMOS process based on a improved 11T SRAM cell with new structure. Final test results verify the function of the SRAM. The minimal operating voltage of the chip is 350mV, where the speed is 165KHz and the leakage power is 42nW and the dynamic power is about 200nW. The designed SRAM can be used in ultra-low-power SoC.