题目/Title：低功耗UHFRFID标签基带处理器的ASIC实现
                        ASIC Implementation of Low Power Baseband Processor for UHF RFID Tag

作者/Author：朱秋玲,张春,王晓辉,刘忠奇,李永明,王志华
                        Qiuling Zhu,Chun Zhang,Xiaohui Wang,Zhongqi Liu,Yongmin Li,Zhihua Wang

期刊/Journal：半导体技术 Semiconductor Technology

年份/Issue Date：2009

卷（期）及页码/Volume（No.）&pages：Vol.34, No.2, pp. 172 - 176

摘要/Abstract：
设计并实现了一种新颖的超高频RFID标签的基带处理器。该标签以ISO/IEC 18000-6C协议为基础，但在反向链路通信方面，在原协议FM0编码/Miller调制副载波的基础上增加了扩频编码的实现，目的是提高反向链路的通信信噪比。该设计支持协议要求的所有11条强制命令的读写操作，概率/分槽防冲突算法，以及对存储器的读写操作。设计中采用了低功耗技术，显著降低了芯片的平均功耗和峰值功耗。芯片采用0.18μm 6层金属CMOS工艺进行流片，面积为0.5 mm^2。测试结果表明，芯片消耗功耗约为16μW，最低工
A novel digital baseband processor of an UHF RFID tag was presented based on the ISO/IEC18000-6 type C standard. In order to enhance the signal-noise ratio in the return link , spread spectrum technique was used in addition to the FM0 encoding/Miller subcarrier modulation. The tag supports all the 11 mandatory commands required by the 6C standard as well as the implementation of probabilistic/ slotted anti-collision scheme and read/write operation to EEPROM. Low power techniques were adopted to reduce the instantaneous power and average power. The chip was designed and fabricated using 0.18μm 6 metal layersCMOS technology. From the measurement result , the overall power consumption is about 16μW at the minimum voltage of 1.04 V , and the chip area is of 0.5 mm2.