题目/Title：用于高精度Σ-Δ数模转换的多级插值滤波器的设计技术
                        A Novel Multi-Stage Interpolation Filter Design Technique for High-Resolution Σ-Δ DAC

作者/Author：陈润,刘力源,李冬梅
                        Run Chen,Liyuan Liu,Dongmei Li

期刊/Journal：半导体学报 Chinese Journal of Semiconductors

年份/Issue Date：2007.Nov.

卷（期）及页码/Volume（No.）&pages：Vol.28, No.11, pp. 1735 - 1741

摘要/Abstract：
提出了一种用于20bit Σ-Δ数模转换器中的内插滤波器的有效实现方法，内插滤波器的过采样率为128. 该方法使用多级结构以降低滤波器系数的复杂度和有限字长效应. 同时提出了基于系数混合基分解的多相半带滤波器的无乘法器实现方法，它降低了控制逻辑的复杂程度,并大大节省了芯片面积. 芯片采用0.13μm CMOS工艺实现，整个插值滤波器面积小于0.63mm2. 整个电路系统仅用简单的硬件单元实现，且结构规整，这有利于大规模集成电路制造,并可应用于高精度数据转换电路中.
This paper presents an efficient way to implement an interpolation filter in a 20bit Σ-Δ DAC with an oversampling ratio of 128.A multistage structure is used to reduce the complexity of filter coefficients and the finite word length effect.A novel method based on mixed-radix number representation is proposed to realize a poly-phase multiplier-free half-band subfilter with a high resolution.This approach reduces the complexity of the control system and saves chip area dramatically.The IC is realized in a standard 0.13μm CMOS process and the interpolation filter occupies less than 0.63mm2.This realization has desirable properties of regularity with simple hardware devices which are suitable for VLSI and can be applied to many other high resolution data converters.