题目/Title：正交本振输出的2.4GHz低功耗锁相环型频率合成器
                        A 2.4GHz Low Power PLL Frequency Synthesizer with I/Q LO Outputs

作者/Author：左玉多,池保勇,王志华
                        Yuduo Zuo,Baoyong Chi,Zhihua Wang

期刊/Journal：微电子学 Microelectronics

年份/Issue Date：2005.13-15 Dec.

卷（期）及页码/Volume（No.）&pages：pp. 6 - 9

摘要/Abstract：
本论文实现了一个可提供正交本振输出的2.4GHz低功耗锁相环型频率合成器，其中的压控振荡器工作于4.8GHz频段，通过二分频提供正交本振输出信号。通过采用注入锁定（ILFD）技术和优化的2/3双模分频器，降低了该频率合成器的功耗。该频率合成器已经采用0.18um CMOS工艺实现，仿真结果表明该频率合成器可提供2.25GHz~2.55GHz的正交本振输出信号，在偏离载波100kHz处的相位噪声为-90dBc/Hz，建立时间小于30uS，总共消耗了4.2mA的电流。
A 2.4GHz low power PLL frequency synthesizer with I/Q LO outputs is presented. VCO of the synthesizer oscillates at 4.8GHz, and a divide-by-2 divider is used to generate quadrature I/Q outputs. With ILFD (Injection Locked Frequency Divider) technique and an optimized dual-modulus divide-by-2/3 divider, the power consumption of the synthesizer is reduced effectively. The design has been implemented in 0.18-μm CMOS. Simulation results show that the synthesizer can provide 2.25~2.55GHz quadrature I/Q outputs with phase noise of -90 dBc/Hz @100KHz. The settling time is less than 30uS, and the current consumption is only 4.2mA.