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题目/Title:JPEG2000 DWT变换器和EBCOT编码器的VLSI结构设计
                        DWT and EBCOT VLSI architecture for JPEG2000

作者/Author:刘雷波,李德建,王学进,孟鸿鹰,王志华,陈弘毅,夏宇闻
                        Leibo Liu,Dejian Li,Xujin Wang,Hongying Meng,Zhihua Wang,Hongyi Chen,Yuwen Xia

期刊/Journal:清华大学学报(自然科学版) Journal of Tsinghua University (Science and Technology)

年份/Issue Date:2003.Apr.

卷(期)及页码/Volume(No.)&pages:Vol.43, No.4, pp. 573 - 576

摘要/Abstract:
为了进行符合新一代静止图像压缩标准 JPEG2 0 0 0的图像编码 IP核设计 ,提出了基于 JPEG2 0 0 0标准的离散小波变换器 (DWT)和优化截断的嵌入式分块编码器 (E-BCOT)的 VL SI结构。DWT采用的空间组合推举体制算法(SCL A)将基于 9/ 7滤波器的标准推举 (lifting)算法体制快速的运算量降低了 5 / 12。EBCOT采用的并行运算和动态内存控制 (DMC)结构 ,在保证编码速度的前提下 ,最大限度减小了片内小波系数缓存量和访问频率。这 2项设计均可以作为单独
Two VLSI architectures were developed for JPEG2000 encoder IP design, the discrete wavelet transform (DWT) and the embedded block coding with optimized truncation (EBCOT) for JPEG2000. The DWT design is based on the spatial combinative lifting algorithm (SCLA) with a 9/7 filter, which requires 7/12 of the computations in the conventional lifting algorithm. The EBCOT design uses parallel processing and dynamic memory control (DMC) architecture, which greatly speeds up the coding process and achieves higher hardware utilization. These two architectures can also be used as independent, efficient IP cores for various real-time imaging applications, such as remote surveillances and digital still cameras.

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