题目/Title：一种速度优化的流水线模数转换电容误差平均技术
                        An Improved Capacitor Averaging Technique for Pipelined ADCs

作者/Author：李福乐,李冬梅,张春,王志华
                        Fule Li,Dongmei Li,Chun Zhang,Zhihua Wang

期刊/Journal：电子学报 Acta Electronica Sinica

年份/Issue Date：2002.Sept.

卷（期）及页码/Volume（No.）&pages：Vol.30, No.9, pp. 1285 - 1287

摘要/Abstract：
无源电容误差平均技术是一种本质线性(Inherently Linear)的流水线模数转换电容失配校准技术,但其转换速度是传统技术的一半.为了提高速度,本文提出了一种改进的电容误差平均技术.该技术从减少一个转换周期所需的时钟相数目和减少每个时钟相的时间两个方面来优化速度.电路分析和MATLAB仿真表明,在两种典型的情况下,改进的技术能将速度提高52%(跨导放大器为开关电容共模反馈)和64%(跨导放大器为非开关电容共模反馈)以上.改进的技术更适用于高速高精度及连续工作的应用场合.
Passive capacitor error averaging is an inherently linear capacitor mismatch calibration technigue for pipelined analog-to-digital conversion，but its conversion speed is halved because of double sampling and double transferring.An improved capacitor error averaging technigue is presented to make the conversion faster. The conversion speed is improved through the reduction of the number of the clock phases reguired for one conversion and the time allocated for one clock phase. Circuits analysis and MATLAB simulation indicate that the speed can be typically improved by more than 52% or 64% when the OTA is switched-capacitor commonmode feed back or not. The improved technigue is ideal for appllcations of high-speed，high-resolution，and continuous operation.