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题目/Title:A VLSI architecture of spatial combinative lifting algorithm based 2-D DWT/IDWT

作者/Author:
                        Leibo Liu,Xuejin Wang,Hongying Meng,Li Zhang,Zhihua Wang,Hongyi Chen

会议/Conference:APCCAS 2002

地点/Location:Denpasar, Bali, Indonesia

年份/Issue Date:2002.28-31 Oct.

页码/pages:pp. 299 - 304

摘要/Abstract:
The Discrete Wavelet Transform (DWT) is the basis for many image compression techniques, such as JPEG2000, MPEG-4, etc. The Spatial Combinative Lifting Algorithm (SCLA) based 2-D DWT/IDWT requires fewer computations than the conventional Lifting Based Implementation (LBI). In comparison with the LBI, SCLA with the 9/7 filter has 7/12 the number of multiplications. This paper proposes a novel VLSI architecture to compute multilevel SCLA based 2-D DWT/IDWT with the 9/7 filter. The line based transform is integrated with the SCLA scheme to reduce the hardware cost and achieve higher hardware utilization. Efficient organization of six line-buffer memories is used to address the high memory bandwidth requirements. This architecture can be used as a compact and efficient core for JPEG2000 VLSI implementation and various real-time image/video applications.

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