题目/Title：An 85MHz-BW 68.5dB-SNDR ASAR-assisted CT 4-0 MASH ΔΣ modulator with half-range dithering-based DAC calibration in 28nm CMOS

作者/Author：
                        Hui Liu,Xinpeng Xing,Georges Gielen

会议/Conference：CICC 2018

地点/Location：San Diego, CA, USA

年份/Issue Date：2018.8-11 April

页码/pages：pp. 1 - 4

摘要/Abstract：
This paper presents an on-chip half-range dithering-based calibration technique for the current-steering feedback DAC in an ASAR-assisted continuous-time 4-0 MASH 螖危 modulator. The proposed calibration randomizes the DAC cells and effectively improves the modulator's SFDR, with limited overhead cost in terms of area and power consumption. An ASAR quantizer is used in the 螖危 modulator to save power consumption and to cancel the comparator mismatch of the conventional flash quantizer. To increase the sampling speed and to reduce the metastability error of the ASAR, a 4-0 MASH topology is used. The prototype modulator is fabricated in a 28nm bulk CMOS technology. The measurement results show that the modulator achieves 68.5dB S NDR and 83.6dB SFDR over a 85MHz bandwidth with a sampling frequency of 1.7 GHz, while dissipating 23.9mW power, leading to a FoMw of 64.9 fJ/step and a FoMs of 164 dB.