题目/Title：A 10 GHz Ring-VCO Based Injection-Locked Clock Multiplier for 40 Gb/s SerDes Application in 65 nm CMOS Technology

作者/Author：
                        Fangxu Lv,Jianye Wang,Heming Wang,Ziqiang Wang,Yajun He,Yongcong Liu,Chun Zhang,Zhihua Wang,Hanjun Jiang

会议/Conference：EDSSC 2017

地点/Location：Hsinchu, Taiwan

年份/Issue Date：2017.18-20 Oct.

页码/pages：pp. 1 - 2

摘要/Abstract：
A 10 GHz 4-phase ring-VCO based injection-locked clock multiplier (RILCM) for 40 Gb/s SerDes application is presented in this paper. The RILCM adopts two loops which share common part circuit to realize the injection lock. The first loop which is the frequency lock loop (FLL), drags the VCO's free-running frequency to the injection lock-in range. Another loop which is the injection timing control loop (ITCL), controls the injection timing of the pulse to reduce the race condition and improve the phase noise. The RILCM is designed in a 65nm CMOS technology and supplied with 1.1V. The simulation results show that the proposed RILCM can provide 4-phase 10 GHz clocks with 3.61ps total jitter, at this time the total consumption is 17 mW.