题目/Title：A 10Gb/s speculative decision feedback equalizer with a novel implementation of adaption in 65nm CMOS technology

作者/Author：
                        Shuai Yuan,Ziqiang Wang,Xuqiang Zheng,Liji Wu,Chun Zhang,Zhihua Wang

会议/Conference：EDSSC 2014

地点/Location：Chengdu, China

年份/Issue Date：2014.18-20 Jun.

页码/pages：pp. 1 - 2

摘要/Abstract：
A 10Gb/s half-rate adaptive 1-tap speculative decision feedback equalizer (DFE) is implemented in 65nm CMOS. Adaption of the DFE is achieved by using a novel mixed-signal implementation of the sign-sign least mean square (SS-LMS) algorithm to continuously adapt the coefficient of the unique tap. The simulation results show that the DFE can totally compensate 16.2dB loss at the Nyquist frequency for 10Gb/s PRBS31 transmission over 700mm RLGC (resistance, inductance, conductance and capacitance) channel. The active layout area is 0.01 mm2 and total power consumption is 24mW for 1.2V supply.