题目/Title：深亚微米混合信号全芯片ESD电路设计
                        Whole-Chip ESD Protection Design for deep Submicron Mix-signal CMOS VLSI

作者/Author：纪宗江,李冬梅
                        Zhongjiang Ji,Dongmei Li

期刊/Journal：半导体技术 Semiconductor Technology

年份/Issue Date：2009

卷（期）及页码/Volume（No.）&pages：Vol.34, No.5

摘要/Abstract：
本文从系统的角度出发，采用电压域分别保护后通过隔离器件连接的方法完成了对深亚微米芯片ESD保护系统的设计。分析了传统输出端保护可能存在的问题，并采用稳妥的方法对输出端进行了保护。设计采用TSMC 0.18微米工艺。测试结果验证了该设计的有效性。
An ESD protection system for deep submicron chips is designed using a systematic view. After every power domain is protected separately, crosscoupled ESD diodes are used to connect the isolated power domain grounds. The problems existed in traditional output ESD protections are analyzed, moreover, an output ESD protection is designed in a safe manner. The prototype test chip was fabricated in a 0.18μm CMOS technology, the test result verified the efficiency of the ESD design.